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Page last modified 17:28, 9 Dec 2011 by toquim
IPFN > FUSION Collaborations > ITER > CODAC > FPSC amendment > Task 1: ATCA-IO-PROCESSOR > Engineering Design
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Engineering Design

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    • Block diagrams (ATCA-IO-PROCESSOR, ADC module, DAC module and RTM);
    • Schematics (ATCA-IO-PROCESSOR, ADC module, DAC module and RTM) - Cadence Orcade Capture files;
    • PCB (ATCA-IO-PROCESSOR, ADC module, DAC module and RTM) - Cadence PCP Editor files;
    • ATCA-IO-PROCESSOR firmware - Xilinx ISE source code files;
    • IPMC software - C source code files;
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    Viewing 2 of 2 comments: view all
    #1
    toquim says:
    The engineering design needs to follow an ITER template? Or can be an IPFN template? edited 07:20, 30 Nov 2011
    Posted 07:19, 30 Nov 2011
    #2
    bruno says:
    I think we should follow the template used for the project, where modifications summary, versioning, etc are included
    Posted 09:29, 5 Dec 2011
    Viewing 2 of 2 comments: view all
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