ATCA-PTSW-AMC4-RTMO

ARTM Power Connector

This connector follows specifications of AdvancedTCA Rear Transition Module Zone 3A, PICMG® 3.8, R1.0 D0.9 from 9 March 2011.

SCL_L and SDA_L of this connector implement a two-wire interface from the carrier board to the ARTM devices.

Table 1. Power/Management Connector Pin (see Table 2-1 of specification).

The Fabric connector follows AdvancedTCA Rear Transition Module Zone 3A, PICMG® 3.8, R1.0 D0.9xc from 3 May 2011 that points out to PICMG^®3.3 Revision 3.0 AdvancedTCA^® Base Specification and auxiliary documents.

The RP31 ARTM may or may not be assembled. There is no internal connection for this connector.

Table 2. PCI Express lanes mapping on the ARTM connector and corresponding Host Assignment.

Table 3. Giga-bit Ethernet mapping (SFP Connector) on the ARTM connector.

(*) Depending on SFP connector used, this signal may not be used.

Table 4. Optical SFP connector mapping on the ARTM connector.

(*) Depending on SFP connector used, this signal may not be used.

Table 5. Clock, Trigger and user defined signals mapping on the ARTM connector.

The ATCA-PTSW-AMC4-RTMOModule has four Four-Channel, pluggable, parallel, fiber-optic QSFP+ transceivers from Avago Technologies[6].

The PCI Express port mapping into the ARTM fabric connector is depicted in Table 2.

The transceivers can be accessed through a two-wire serial interface that is mapped on the ARTM power connector interface (see section 2.1). Since the ARTM power connector provides a single port a de-multiplexing is implemented (see section 3.1).

Details about transceiver configuration can be found in section 3.2.

The RTM_Host Module has two 1000BASE-T 1.25 GBd Small Form Pluggable (SFP) electrical transceivers over Category 5 Cable. The transceivers used are ABCU-5710RZ[7] from Avago Technologies.

These Ethernet ports are mapped into ARTM fabric connector as depicted in Table 3.

The transceivers can be accessed through a two-wire serial interface that is mapped on the ARTM power connector interface (see section 2.1). Since the ARTM power connector provides a single port a de-multiplexing is implemented (see section 3.1).

Details about transceiver configuration can be found in section 3.3.

The RTM_Host Module has three Short-Wavelength Pluggable (SFP) Transceivers from Finisar, capable of up to 1.25 Gb/s duplex with a 850 nm VCSEL laser transmitter.

These Gigabit Optical ports are mapped into ARTM fabric connector as depicted in Table 4.

The RTM_Host Module includes a connector that may be used for the distribution of several clock signal and general purpose signals. The following table presents the connector pinout.

Table 6. Clock and General purpose Connector pinout (J7).

Configurations of ATCA-PTSW-AMC4-RTMOmodule are limited to transmitter/receiver connector/chipsets where protocol and/or physical operation condition may be changed. In addition some features may be used to identify installed infrastructure. The configuration is performed trough the Power and Management plug on Zone 3 (see Table 1).

Status will be available through Led’s on rear panel and on Zone 3 Data Connectors as presented on .

 The ARTM configuration uses I2C protocol at address 0x70. The ARTM has two internal devices that may require configuration, which are the two Gigabit Ethernet ports. The access and configuration must be supported by the ATCA Host Board.

Table 7presents the mapping for the I2C switch (PC9548A from NXP Semiconductors^®) with the indication of Control bit register (Figure 2) that enables each port. For detailed information regarding I2C switch PCA9548A data sheet[8] must be consulted.

Table 7. Mapping of ARTM I2C devices into PCA9548A ports.

Figure 2. PC9548A Control bit Register.

.

The AFBR-79EQDZ PHY has single address, multiple page memory map architecture accessed through I2C on the base address 0xA0.

The component has a 256-byte address range (starting in 0xA0). The lower 128-bytes are directly accessed. The higher 128-bytes access the selected page (Figure 3). For further details see AFBR-79EQDZ data sheet[9].

Figure 3. AFBR-79EQDZ Serial Address Page Structure

The ABCU-5710RZ PHY has 32 16-bit internal registers (Table 8) either read-only or Read/Write that can be accessed by I2C on the address 0x31.

Table 8. ABCU-5710RZ internal registers mapping (See Data Sheet for details).

There are five status led’s that may indicate Loss Of Signal. Table 9presents LED status description.

Table 9. Led Status Indicators.